SSE4 (Streaming SIMD Extensions 4) is a SIMD CPU instruction set used in the Intel Core microarchitecture and AMD K10 (K8L). It was announced on September...
23 KB (1,614 words) - 12:58, 25 May 2024
Both have cores. Requires firmware support. Requires firmware support. No SSE4. No SSSE3. Single-precision performance is calculated from the base (or boost)...
186 KB (10,618 words) - 05:39, 24 May 2024
nm "Ironlake" GPU. All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX...
151 KB (4,632 words) - 20:14, 15 May 2024
Intel Upgrade Service. All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX...
101 KB (3,933 words) - 09:51, 14 April 2024
All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX2, AVX-512, F16C, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an...
46 KB (648 words) - 12:09, 28 April 2024
(7.34 mm x 8.89 mm) All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX...
86 KB (3,164 words) - 15:09, 23 April 2024
All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, FMA3, F16C, BMI1 (Bit Manipulation Instructions1), BMI2, Enhanced Intel SpeedStep...
37 KB (445 words) - 04:02, 16 April 2024
All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, F16C, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation)...
36 KB (331 words) - 04:57, 29 January 2024
All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation)...
25 KB (336 words) - 20:09, 15 April 2024
Penryn microarchitecture All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit...
44 KB (877 words) - 22:09, 8 May 2024